The present invention relates to a semiconductor device composed of a plurality of stacked semiconductor chips and to a method for fabricating the same.
As an example of the semiconductor device composed of a plurality of stacked semiconductor chips, a structure has been known in which a plurality of semiconductor chips are mounted in stacked relation on a board termed an interposer or a substrate, which are sealed with a mold resin (see, e.g., page 7 and FIG. 3 of Japanese Laid-Open Patent Publication No. HEI 11-204720). This type of semiconductor device is also referred to as a stacked package. An object of forming the semiconductor device in such a multilayer-chip-type structure is to increase the mounting density of the semiconductor chips.
FIGS. 5A and 5B show a conventional multilayer-chip-type semiconductor device, of which FIG. 5A is a cross-sectional view and FIG. 5B is a plan view.
In FIGS. 5A and 5B, a first semiconductor chip 103 having bumps 103a are mounted with the bumps 103a facing downward on a substrate 101 having electrode pads 101a on the upper surface thereof and lands 101b on the lower surface thereof with a first adhesion layer 102 interposed therebetween. A second semiconductor chip 105 having electrodes pads 105a on the upper surface thereof is mounted on the first semiconductor chip 103 with a second adhesion layer 104 interposed therebetween. The electrodes pads 105a of the second semiconductor chip and the electrode pads 101a of the substrate 101 are electrically bonded to each other with wires 107. The first semiconductor chip 103, the second semiconductor chip 105, and the wires 107 are sealed with a mold resin 108, whereby the semiconductor device is formed.
The first adhesion layer 102 is composed of a film-like adhesive or a liquid adhesive which is filled in the entire region other than the bumps 103a between the substrate 101 and the first semiconductor chip 103 to firmly fix the first semiconductor chip 103 to the chip mounting region of the substrate 101. The arrangement disperses a stress over the entire chip mounting region of the substrate 101 and thereby increases the reliability of the semiconductor device.
In the conventional multilayer-chip-type semiconductor device, the peripheral edge portion of the first adhesion layer 102 is protruding outwardly from the peripheral edge portion of the first semiconductor chip 103, as shown in FIGS. 5A and 5B. This causes a first problem that, due to the protrusion (fillet) 102a, the size reduction of the semiconductor device is difficult. Since the wires 107 providing bonding between the electrode pads 105a of the second semiconductor chip 105 and the first electrode pads 101a of the substrate 101 should be disposed externally of the protrusion 102a of the first adhesion layer 102, i.e., since the electrode pads 101a of the substrate 101 should be disposed externally of the protrusion 102a of the first adhesion layer 102, the area of the substrate 101 is inevitably increased so that the size reduction of the semiconductor device is difficult.
The conventional multilayer-chip-type semiconductor device also has a second problem that the reliability thereof lowers due to the protrusion 102a of the first adhesion layer 102. Since the wires 107 should be disposed externally of the protrusion 102a of the first adhesion layer 102, as described above, the lengths of the wires 107 are increased disadvantageously. This causes a phenomenon in which the wires 107 are deformed by the mold resin 108 in sweeping motion in the step of injecting the mold resin 108 in a mold (the phenomenon is termed wire sweep or wire flow) so that such a defect as the breakage of the wire 107 or a short circuit between the adjacent wires 107 is more likely to occur. As the lengths of the wires 107 increase, the fluidity of the mold resin 108 is reduced so that, in some cases, an unfilled portion or a void occurs in the mold resin 108 to reduce the reliability of the semiconductor device 108. The second problem is conspicuously observed in a semiconductor device having the wires 107 at a high density.